Cause : Bas clk cyc too low comes when the closed-loop control / monitoring cannot maintain the envisaged clock cycle. The runtime of the closed-loop control/monitoring is too long for the particular clock cycle or the computing time remaining in the system is not sufficient for the closed-loop control/monitoring.

Increase the basic clock cycle of DRIVE-CLiQ communication. See also: p0112 (Sampling times pre-setting p0115)